rv64im_min_sim_smoke.nx

rv64im_min_sim_smoke.nx -- end-to-end smoke for the RV64IM-min sim. Hand-codes a tiny RV64IM program that writes "OK\n" via the UART MMIO + poweroffs via the SiFive finisher. Runs it on the simulator (which ties decoder + ALU + regfile + CSR + CLINT + UART together) and asserts the captured UART byte stream matches "OK\n". This is the first integration test that exercises every module shipped in nishi-silicon. If this passes, the path from "NishiHDL DSL declared" to "RV64IM program executes" is proven -- the remaining steps to FPGA bring-up are: ELF loader, kernel boot, then nishi-synth + Yosys. Hand-coded program (RV64IM, position-independent, starts at PC): lui a0, 0x10000 ; a0 = 0x10000000 (UART base) addi a1, zero, 'O' ; a1 = 0x4F sb a1, 0(a0) ; UART THR <- 'O' addi a1, zero, 'K' ; a1 = 0x4B sb a1, 0(a0) ; UART THR <- 'K' addi a1, zero, '\n' ; a1 = 0x0A sb a1, 0(a0) ; UART THR <- '\n' lui a0, 0x100 ; a0 = 0x100000 (finisher base) lui a1, 0x5 ; a1 = 0x5000 addi a1, a1, 0x555 ; a1 = 0x5555 sw a1, 0(a0) ; finisher <- 0x5555 -> sim halts Encoded as 32-bit little-endian instruction words below.