code wiki / _hdl_build / nx_geneal_energy_sov.nx

nx_geneal_energy_sov.nx

buildroot/runtime/_hdl_build/nx_geneal_energy_sov.nx

17752 B314 linesdepth 5pulls 17 transitivereach 0 importersview sourcekind tool
docsdependenciesstructsconstsfunctions

about

nx_geneal_energy_sov.nx -- ENERGY as a recorded genealogy FEATURE of descendants. Operator: the genealogist must record ENERGY USE per descendant, alongside "can we generate the code", its capability, and cost -- so we can compare our family's member against another family's member for the SAME capability. This builds that feature and a MEASURED cross-family comparison. SOVEREIGN measurement (per the system-not-person rule): the cost is the instruction count the program retires on the genesis sim (sim.steps) -- the system measuring its OWN cost, deterministic, never a host stopwatch. Instructions-retired is the standard architectural ENERGY PROXY (energy ~ instructions x energy-per-instruction); it is a proxy, not joules, and it is directly comparable across family members on the same ISA. Demonstration: capability C = f(a)=a*a, expressible by two implementation FAMILIES -- - NAIVE family: a loop, acc=0;i=a;while i>0{acc+=a;i--} -> O(a) instructions - DISCOVERED family: a straight-line program the team DERIVES by search -> O(1) instructions We record both as genealogy descendants {family, capability NN/NN, generatable, energy_total, energy@small, energy@large, scaling} and emit the measured comparison. Honesty controls: the numbers must be REAL -- naive cost must GROW with input, discovered cost must stay FLAT, else RED. license_tier: ORIGINAL

dependencies 10 imports · 0 importers

nx_syscalls.nx nx_itoa_lib.nx nishi_hdl_primitives.nx rv64im_min_decoder.nx rv64im_min_alu.nx rv64im_min_regfile.nx rv64im_min_csr.nx rv64im_min_clint.nx rv64im_min_uart.nx rv64im_min_sim.nx nx_geneal_energy_sov.nx

imports: nx_syscalls.nxnx_itoa_lib.nxnishi_hdl_primitives.nxrv64im_min_decoder.nxrv64im_min_alu.nxrv64im_min_regfile.nxrv64im_min_csr.nxrv64im_min_clint.nxrv64im_min_uart.nxrv64im_min_sim.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main ge_p sys_write sys_mmap ge_derive sys_mmap ↻ ge_fill ge_randslot ge_rand ge_fit ge_ha ge_hb ge_eval_s ge_aluop ge_reg ge_target ge_abs ge_tourney ge_rand ↻ ge_rand ↻ ge_randslot ↻ ge_pn nxi_out nxi_fd sys_mmap ↻ ccz_cat_num sys_write ↻ sys_munmap ge_capability sys_mmap ↻ ge_ha ↻ ge_hb ↻ ge_run sys_mmap ↻ nx_rv64im_rf_init nx_rv64im_csr_init nx_clint_init nx_uart_init nx_rv64im_sim_init ge_emit_straight

structs

none

consts

30const EVO_MAGIC_2862933555777941757: i64 = 2862933555777941757
31const EVO_MAGIC_3037000493: i64 = 3037000493
32const EVO_MAGIC_1000000000000: i64 = 1000000000000
33const EVO_MAGIC_10000000000000: i64 = 10000000000000
34const EVO_MAGIC_1000000000: i64 = 1000000000
35const EVO_MAGIC_20260615: i64 = 20260615
37const GLEN: i64 = 5 // straight-line genome: [op1, r1, r2, op2, r3]
38const EVO_P: i64 = 256
39const EVO_G: i64 = 600
40const EVO_T: i64 = 5
41const NTRAIN: i64 = 8
42const NHELD: i64 = 12
44const IR_MEM_BASE: i64 = 0x80000000
45const IR_MEM_SIZE: i64 = 8192
46const IR_TX_CAP: i64 = 256
47const RES_OFF: i64 = 0x700
240const EE_TMP: *u8 = "knowledge/registry/energy_genealogy.tsv.tmp"
241const EE_LIVE: *u8 = "knowledge/registry/energy_genealogy.tsv"

functions

49func ge_rand(s: *i64) -> i64 { s[0] = s[0] * EVO_MAGIC_2862933555777941757 + EVO_MAGIC_3037000493; return (s[0] >> 17) & 0x3fffffff }
50func ge_abs(x: i64) -> i64 { if x < 0 { return 0 - x } return x }
called by 1: ge_fit
51func ge_ha(i: i64) -> i64 { if i==0 {return 3} if i==1 {return 8} if i==2 {return 11} if i==3 {return 2} if i==4 {return 10} if i==5 {return 13} if i==6 {return 7} if i==7 {return 4} if i==8 {return 12} if i==9 {return 6} if i==10 {return 9} return 5 }
called by 2: ge_fitge_capability
52func ge_hb(i: i64) -> i64 { if i==0 {return 5} if i==1 {return 2} if i==2 {return 7} if i==3 {return 11} if i==4 {return 4} if i==5 {return 3} if i==6 {return 9} if i==7 {return 8} if i==8 {return 2} if i==9 {return 13} if i==10 {return 6} return 10 }
called by 2: ge_fitge_capability
55func ge_target(a: i64, b: i64) -> i64 { return a * a }
called by 2: ge_fitge_capability
58func ge_aluop(op: i64, x: i64, y: i64) -> i64
called by 1: ge_eval_s
63func ge_reg(idx: i64, a: i64, b: i64) -> i64 { if idx == 0 { return 0 } if idx == 1 { return a } if idx == 2 { return b } return a }
called by 1: ge_eval_s
64func ge_eval_s(g: *i64, base: i64, a: i64, b: i64) -> i64
called by 1: ge_fit calls 2: ge_aluopge_reg
70func rv_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
71func rv_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 }
72func rv_rtype(f7: i64, rs2: i64, rs1: i64, f3: i64, rd: i64) -> i64 { return (f7 << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x33 }
73func rv_store_imm(rs2: i64, rs1: i64, f3: i64, imm: i64) -> i64 { return (((imm >> 5) & 0x7f) << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | ((imm & 0x1f) << 7) | 0x23 }
called by 1: ge_tail
74func rv_branch(f3: i64, rs1: i64, rs2: i64, imm: i64) -> i64 { return (((imm >> 12) & 1) << 31) | (((imm >> 5) & 0x3f) << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (((imm >> 1) & 0xf) << 8) | (((imm >> 11) & 1) << 7) | 0x63 }
called by 1: ge_emit_loop
75func rv_jal(rd: i64, imm: i64) -> i64 { return (((imm >> 20) & 1) << 31) | (((imm >> 1) & 0x3ff) << 21) | (((imm >> 11) & 1) << 20) | (((imm >> 12) & 0xff) << 12) | (rd << 7) | 0x6f }
called by 1: ge_emit_loop
76func ge_f7(op: i64) -> i64 { if (op % 3) == 1 { return 0x20 } if (op % 3) == 2 { return 0x01 } return 0x00 }
called by 1: ge_emit_straight
77func ge_regx(idx: i64) -> i64 { if idx == 0 { return 0 } if idx == 1 { return 1 } if idx == 2 { return 2 } return 1 }
called by 1: ge_emit_straight
78func rv_w32(buf: *u8, off: i64, w: i64) -> i64
85func ge_tail(mem: *u8, o: i64) -> i64
96func ge_emit_straight(mem: *u8, g: *i64, a: i64, b: i64) -> i64
106func ge_emit_loop(mem: *u8, a: i64, b: i64) -> i64
119func ge_read_i64(mem: *u8, off: i64) -> i64
called by 1: ge_run
125func ge_run(which: i64, g: *i64, a: i64, b: i64, steps: *i64) -> i64
149func ge_fit(pop: *i64, base: i64) -> i64
162func ge_randslot(idx: i64, state: *i64) -> i64 { if idx == 0 { return ge_rand(state) % 3 } if idx == 3 { return ge_rand(state) % 3 } return ge_rand(state) % 4 }
called by 2: ge_fillge_derive calls 1: ge_rand
163func ge_fill(g: *i64, base: i64, state: *i64) -> i64 { var i: i64 = 0; while i < GLEN { g[base+i] = ge_randslot(i, state); i = i + 1 } return 0 }
called by 1: ge_derive calls 1: ge_randslot
164func ge_tourney(fit: *i64, state: *i64) -> i64
called by 1: ge_derive calls 1: ge_rand
169func ge_derive(state: *i64, G: *i64) -> i64
202func ge_p(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
called by 2: ge_rowmain calls 1: sys_write
207func ge_pn(v: i64) -> i64 { nxi_out(v); return 0 }
called by 2: ge_rowmain calls 1: nxi_out
211func ge_capability(which: i64, G: *i64, tot: *i64) -> i64
226func ge_row(label: *u8, which: i64, G: *i64, cap: i64, etot: i64) -> i64
called by 1: main calls 4: sys_mmapge_runge_pge_pn
242func ee_w(fd: i64, s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(fd, s, n); return 0 }
called by 2: ee_rowee_author calls 1: sys_write
247func ee_wn(fd: i64, v: i64) -> i64 { nxi_fd(fd, v); return 0 }
called by 1: ee_row calls 1: nxi_fd
249func ee_row(fd: i64, name: *u8, family: *u8, cap: i64, etot: i64, esmall: i64, elarge: i64) -> i64
called by 1: ee_author calls 2: ee_wee_wn
256func ee_author(capS: i64, eS: i64, s4: i64, s12: i64, capL: i64, eL: i64, l4: i64, l12: i64) -> i64
269func main() -> i64