nx_isa_equiv_sov.nx

nx_isa_equiv_sov.nx -- THE DIFFERENTIAL-REPLACEMENT TEST, ON THE HARDWARE. The operator's own method ("comp a working child, turn it off, emit ours, see if they function the same") performed at the genesis-hardware level, with NO Claude crutch left: (1) the team COMPOSES its own random non-trivial target program T (over the REAL RV64IM ALU ops that rv64im_min_sim executes -- ADD/SUB/MUL/AND/OR/SLT on a register machine), (2) the team DERIVES a program G by evolutionary search that matches T's TRAIN examples (search sees only (a,b)->T(a,b) points, never T's source), (3) we ENCODE BOTH T and G to real RV64 machine code, run BOTH on rv64im_min_sim (god) over 12 HELD-OUT inputs, and verify sim(T) == sim(G) as FULL 64-bit values. The equivalence verdict reads the hardware -- the interpreter only GUIDES the search, it is NOT in the proof. Two controls keep it honest: a FAITHFUL-ENCODE control (all 6 ops encode->run->match the ALU) and a NEGATIVE control (a perturbed G the differential MUST catch -- proving the test discriminates, not rubber-stamps). Full 64-bit read-back: each program does `sd x3, RES_OFF(x5)` to scratch RAM; store64 writes through to mem_buf (verified rv64im_min_sim.nx:415), which we read back directly. license_tier: ORIGINAL