code wiki / _hdl_build / nx_isa_loop_sov.nx

nx_isa_loop_sov.nx

buildroot/runtime/_hdl_build/nx_isa_loop_sov.nx

18124 B342 linesdepth 5pulls 17 transitivereach 0 importersview sourcekind tooltopic isa
docsdependenciesstructsconstsfunctions

about

nx_isa_loop_sov.nx -- LOOP rung: derive ITERATIVE programs with a BACKWARD branch, run on god. The forward-branch rung (nx_isa_cf_sov) exercised a data-dependent path; this exercises a real LOOP -- a backward JAL (negative, sign-extended imm_j) around a decrementing counter (guaranteed termination). The new hardware path proven: the sim's negative branch/jump immediate. target/derived shape: acc = 0; i = a; while i > 0 { acc = acc + BODY(i,a,b); i = i - 1 } BODY = op2( op1(reg,reg), reg ) over registers {0, i, a, b}, op in {ADD,SUB,MUL}. (1) team COMPOSES a random non-trivial such loop T (non-constant over train, not all-zero), (2) team DERIVES a same-shape G by GA on T's TRAIN examples, (3) ENCODE both to a real RV64 loop (beq exit + backward jal) + run BOTH on rv64im_min_sim over 12 HELD-OUT inputs + verify sim(T)==sim(G). Termination is structural (counter i = a <= 13 decrements to 0), so every candidate halts; the search never hangs. Controls: FAITHFUL (loops with KNOWN closed forms a*a, a(a+1)/2, b*a(a+1)/2 -- correct only if the loop truly iterates a times on the hardware) + NEGATIVE (a perturbed body the differential must catch). license_tier: ORIGINAL

dependencies 10 imports · 0 importers

nx_syscalls.nx nx_itoa_lib.nx nishi_hdl_primitives.nx rv64im_min_decoder.nx rv64im_min_alu.nx rv64im_min_regfile.nx rv64im_min_csr.nx rv64im_min_clint.nx rv64im_min_uart.nx rv64im_min_sim.nx nx_isa_loop_sov.nx

imports: nx_syscalls.nxnx_itoa_lib.nxnishi_hdl_primitives.nxrv64im_min_decoder.nxrv64im_min_alu.nxrv64im_min_regfile.nxrv64im_min_csr.nxrv64im_min_clint.nxrv64im_min_uart.nxrv64im_min_sim.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main lp_p sys_write lp_faithful sys_mmap lp_set lp_ha lp_hb lp_run_prog sys_mmap ↻ nx_rv64im_rf_init nx_rv64im_csr_init nx_clint_init nx_uart_init nx_rv64im_sim_init lp_emit rv_w32 rv_addi rv_lui rv_branch rv_rtype lp_f7 lp_regx rv_jal rv_store_imm nx_rv64im_sim_run nx_rv64im_sim_step nx_clint_tick nx_clint_update_mtip nx_rv64im_csr_tick_mcycle nx_clint_mtip_get nx_rv64im_csr_read nx_csr_addr_to_slot nx_rv64im_sim_take_trap nx_rv64im_csr_read ↻ nx_rv64im_csr_write nx_rv64im_xlate nx_rv64im_csr_read ↻ nx_rv64im_is_device sys_mmap ↻

structs

none

consts

29const EVO_MAGIC_2862933555777941757: i64 = 2862933555777941757
30const EVO_MAGIC_3037000493: i64 = 3037000493
31const EVO_MAGIC_1000000000000: i64 = 1000000000000
32const EVO_MAGIC_10000000000000: i64 = 10000000000000
33const EVO_MAGIC_1000000000: i64 = 1000000000
34const EVO_MAGIC_2654435761: i64 = 2654435761
35const EVO_MAGIC_12345: i64 = 12345
37const GLEN: i64 = 5 // [op1, r1, r2, op2, r3] (BODY = op2(op1(reg r1,reg r2), reg r3))
38const EVO_P: i64 = 256
39const EVO_G: i64 = 800
40const EVO_T: i64 = 5
41const NTRAIN: i64 = 8
42const NHELD: i64 = 12
44const IR_MEM_BASE: i64 = 0x80000000
45const IR_MEM_SIZE: i64 = 8192
46const IR_TX_CAP: i64 = 256
47const RES_OFF: i64 = 0x700

functions

49func lp_rand(s: *i64) -> i64 { s[0] = s[0] * EVO_MAGIC_2862933555777941757 + EVO_MAGIC_3037000493; return (s[0] >> 17) & 0x3fffffff }
50func lp_abs(x: i64) -> i64 { if x < 0 { return 0 - x } return x }
called by 1: lp_fit
52func lp_ta(i: i64) -> i64 { if i==0 {return 6} if i==1 {return 4} if i==2 {return 9} if i==3 {return 5} if i==4 {return 7} if i==5 {return 3} if i==6 {return 8} return 2 }
called by 2: lp_composelp_fit
53func lp_tb(i: i64) -> i64 { if i==0 {return 4} if i==1 {return 7} if i==2 {return 2} if i==3 {return 9} if i==4 {return 3} if i==5 {return 6} if i==6 {return 5} return 8 }
called by 2: lp_composelp_fit
54func lp_ha(i: i64) -> i64 { if i==0 {return 3} if i==1 {return 8} if i==2 {return 11} if i==3 {return 2} if i==4 {return 10} if i==5 {return 13} if i==6 {return 7} if i==7 {return 4} if i==8 {return 12} if i==9 {return 6} if i==10 {return 9} return 5 }
55func lp_hb(i: i64) -> i64 { if i==0 {return 5} if i==1 {return 2} if i==2 {return 7} if i==3 {return 11} if i==4 {return 4} if i==5 {return 3} if i==6 {return 9} if i==7 {return 8} if i==8 {return 2} if i==9 {return 13} if i==10 {return 6} return 10 }
58func lp_aluop(op: i64, x: i64, y: i64) -> i64
called by 1: lp_body
63func lp_reg(idx: i64, i: i64, a: i64, b: i64) -> i64
called by 1: lp_body
69func lp_body(gen: *i64, base: i64, i: i64, a: i64, b: i64) -> i64
called by 1: lp_eval_at calls 2: lp_aluoplp_reg
73func lp_eval_at(gen: *i64, base: i64, a: i64, b: i64) -> i64
79func lp_eval(gen: *i64, a: i64, b: i64) -> i64 { return lp_eval_at(gen, 0, a, b) }
82func rv_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
called by 1: lp_emit
83func rv_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 }
called by 1: lp_emit
84func rv_rtype(f7: i64, rs2: i64, rs1: i64, f3: i64, rd: i64) -> i64 { return (f7 << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x33 }
called by 1: lp_emit
85func rv_store_imm(rs2: i64, rs1: i64, f3: i64, imm: i64) -> i64 { return (((imm >> 5) & 0x7f) << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | ((imm & 0x1f) << 7) | 0x23 }
called by 1: lp_emit
86func rv_branch(f3: i64, rs1: i64, rs2: i64, imm: i64) -> i64
called by 1: lp_emit
89func rv_jal(rd: i64, imm: i64) -> i64
called by 1: lp_emit
92func lp_f7(op: i64) -> i64 { if op == 1 { return 0x20 } if op == 2 { return 0x01 } return 0x00 }
called by 1: lp_emit
94func lp_regx(idx: i64) -> i64 { if idx == 0 { return 0 } if idx == 1 { return 4 } if idx == 2 { return 1 } return 2 }
called by 1: lp_emit
95func rv_w32(buf: *u8, off: i64, w: i64) -> i64
called by 1: lp_emit
108func lp_emit(mem: *u8, gen: *i64, a: i64, b: i64) -> i64
128func lp_read_i64(mem: *u8, off: i64) -> i64
called by 1: lp_run_prog
134func lp_run_prog(gen: *i64, a: i64, b: i64) -> i64
157func lp_randslot(idx: i64, state: *i64) -> i64
called by 2: lp_filllp_mut calls 1: lp_rand
162func lp_fill(gen: *i64, base: i64, state: *i64) -> i64
called by 2: lp_composelp_derive calls 1: lp_randslot
168func lp_compose(state: *i64, T: *i64) -> i64
185func lp_fit(pop: *i64, base: i64, T: *i64) -> i64
198func lp_tourney(fit: *i64, state: *i64) -> i64
called by 1: lp_derive calls 1: lp_rand
203func lp_mut(gen: *i64, base: i64, state: *i64) -> i64
called by 1: lp_derive calls 2: lp_randlp_randslot
208func lp_derive(T: *i64, state: *i64, G: *i64) -> i64
241func lp_p(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
246func lp_pn(v: i64) -> i64 { nxi_out(v); return 0 }
251func lp_set(g: *i64, o1: i64, r1: i64, r2: i64, o2: i64, r3: i64) -> i64 { g[0]=o1; g[1]=r1; g[2]=r2; g[3]=o2; g[4]=r3; return 0 }
called by 1: lp_faithful
252func lp_faithful() -> i64
270func lp_hw_agree(A: *i64, B: *i64) -> i64
275func lp_hw_faithful(T: *i64) -> i64
281func lp_seed(seed: i64) -> i64
303func lp_negctl(seed: i64) -> i64
325func main() -> i64