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nx_isa_run_sov.nx

buildroot/runtime/_hdl_build/nx_isa_run_sov.nx

5484 B98 linesdepth 5pulls 17 transitivereach 0 importersview sourcekind tooltopic isa
docsdependenciesstructsconstsfunctions

about

nx_isa_run_sov.nx -- CLOSE THE LOOP (hardware -> derive -> hardware). A search-derived RV64 program RUNS on the genesis sim rv64im_min_sim (god). The instruction sequence MUL x3,x1,x2 ; ADD x3,x3,x1 is exactly what nx_evo_isa derives for f(a,b)=a*b+a; here we ENCODE it to real RV64 machine code (the encoders -- rv_lui IS the search-derived enc_u), wrap it to load a,b + write the result byte to the NS16550A UART + halt via the SiFive finisher, LOAD it into the sim, RUN it, and VERIFY the captured UART byte == (a*b+a)&0xff. Mirrors rv64im_min_sim_smoke's device setup. license_tier: ORIGINAL

dependencies 10 imports · 0 importers

nx_syscalls.nx nx_itoa_lib.nx nishi_hdl_primitives.nx rv64im_min_decoder.nx rv64im_min_alu.nx rv64im_min_regfile.nx rv64im_min_csr.nx rv64im_min_clint.nx rv64im_min_uart.nx rv64im_min_sim.nx nx_isa_run_sov.nx

imports: nx_syscalls.nxnx_itoa_lib.nxnishi_hdl_primitives.nxrv64im_min_decoder.nxrv64im_min_alu.nxrv64im_min_regfile.nxrv64im_min_csr.nxrv64im_min_clint.nxrv64im_min_uart.nxrv64im_min_sim.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main sys_mmap nx_rv64im_rf_init nx_rv64im_csr_init nx_clint_init nx_uart_init nx_rv64im_sim_init ir_emit rv_w32 rv_addi rv_rtype rv_lui rv_store nx_rv64im_sim_run nx_rv64im_sim_step nx_clint_tick nx_clint_update_mtip nx_rv64im_csr_tick_mcycle nx_clint_mtip_get nx_rv64im_csr_read nx_csr_addr_to_slot nx_rv64im_sim_take_trap nx_rv64im_csr_read ↻ nx_rv64im_csr_write nx_csr_addr_to_slot ↻ nx_csr_is_read_only nx_rv64im_xlate nx_rv64im_csr_read ↻ nx_rv64im_is_device sys_mmap ↻ nx_sv39_walk nx_mmu_inrange nx_mmu_rd64 nx_mmu_inrange ↻ nx_mmu_rd64 ↻ nx_mmu_wr64 nx_rv64im_csr_write ↻ nx_rv64im_sim_load32 sys_mmap ↻ nx_virtio_read32

structs

none

consts

19const IR_MEM_BASE: i64 = 0x80000000
20const IR_MEM_SIZE: i64 = 4096
21const IR_TX_CAP: i64 = 256

functions

23func ir_p(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
called by 1: main calls 1: sys_write
28func ir_n(v: i64) -> i64 { nxi_out(v); return 0 }
called by 1: main calls 1: nxi_out
31func rv_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
called by 1: ir_emit
32func rv_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 }
called by 1: ir_emit
33func rv_rtype(f7: i64, rs2: i64, rs1: i64, f3: i64, rd: i64) -> i64 { return (f7 << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x33 }
called by 1: ir_emit
34func rv_store(rs2: i64, rs1: i64, f3: i64) -> i64 { return (rs2 << 20) | (rs1 << 15) | (f3 << 12) | 0x23 } // imm = 0
called by 1: ir_emit
35func rv_w32(buf: *u8, off: i64, w: i64) -> i64
called by 1: ir_emit
44func ir_emit(mem: *u8, a: i64, b: i64) -> i64
60func main() -> i64