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nx_rv64_amo_gate.nx

buildroot/runtime/_hdl_build/nx_rv64_amo_gate.nx

7491 B112 linesdepth 5pulls 16 transitivereach 0 importersview sourcekind gate/prooftopic rv64
docsdependenciesstructsconstsfunctions

about

nx_rv64_amo_gate.nx -- RV64A (atomics) conformance gate for the sovereign behavioral sim. Closes the F107h atomics rung: proves lr/sc + amo{swap,add,and,or,xor,min,max,minu,maxu}.{w,d} decode+execute correctly on rv64im_min_sim by asserting rd (old value) + memory (new value) against HAND-COMPUTED expected results. Self-checking, deterministic, reproducible. expect_exit:0

dependencies 10 imports · 0 importers

nx_syscalls.nx nishi_hdl_primitives.nx rv64im_min_decoder.nx rv64im_min_alu.nx rv64im_min_regfile.nx rv64im_min_csr.nx rv64im_min_clint.nx rv64im_min_uart.nx rv64im_min_virtio.nx rv64im_min_sim.nx nx_rv64_amo_gate.nx

imports: nx_syscalls.nxnishi_hdl_primitives.nxrv64im_min_decoder.nxrv64im_min_alu.nxrv64im_min_regfile.nxrv64im_min_csr.nxrv64im_min_clint.nxrv64im_min_uart.nxrv64im_min_virtio.nxrv64im_min_sim.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main g_puts sys_write sys_mmap run_amo sys_mmap ↻ nx_rv64im_rf_init nx_rv64im_csr_init nx_clint_init nx_uart_init nx_rv64im_sim_init wr64 nx_rv64im_rf_write put_inst amo_enc nx_rv64im_sim_step nx_clint_tick nx_clint_update_mtip nx_rv64im_csr_tick_mcycle nx_clint_mtip_get nx_rv64im_csr_read nx_csr_addr_to_slot nx_rv64im_sim_take_trap nx_rv64im_csr_read ↻ nx_rv64im_csr_write nx_csr_addr_to_slot ↻ nx_csr_is_read_only nx_rv64im_xlate nx_rv64im_csr_read ↻ nx_rv64im_is_device sys_mmap ↻ nx_sv39_walk nx_mmu_inrange nx_mmu_rd64 nx_mmu_inrange ↻ nx_mmu_rd64 ↻ nx_mmu_wr64 nx_rv64im_csr_write ↻ nx_rv64im_sim_load32 sys_mmap ↻

structs

none

consts

30const AMO_MEMB: i64 = 0x80000000
31const AMO_MEMS: i64 = 65536
32const AMO_SCR: i64 = 0x80002000 // scratch address the amo targets

functions

16func g_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 2: chkmain calls 1: sys_write
17func g_ph(v: i64) -> i64
called by 2: chkmain calls 2: sys_mmapsys_write
22func chk(name: *u8, got: i64, exp: i64, fails: *i64) -> i64
called by 1: main calls 2: g_putsg_ph
35func amo_enc(funct5: i64, rs2: i64, rs1: i64, funct3: i64, rd: i64) -> i64
called by 2: run_amorun_lrsc
38func wr64(mem: *u8, off: i64, v: i64) -> i64 { var i: i64=0; while i<8 { mem[off+i]=((v>>(i*8))&0xff) as u8; i=i+1 } return 0 }
called by 2: run_amorun_lrsc
39func rd64(mem: *u8, off: i64) -> i64 { var v: i64=0; var i: i64=0; while i<8 { v=v|((mem[off+i] as i64)<<(i*8)); i=i+1 } return v }
called by 2: run_amorun_lrsc
40func put_inst(mem: *u8, off: i64, inst: i64) -> i64
called by 2: run_amorun_lrsc
45func run_amo(funct5: i64, funct3: i64, initval: i64, operand: i64, out: *i64) -> i64
called by 1: main calls 13: sys_mmapnx_rv64im_rf_initnx_rv64im_csr_initnx_clint_initnx_uart_initnx_rv64im_sim_init+7
63func run_lrsc(initval: i64, scval: i64, do_lr: i64, out: *i64) -> i64
called by 1: main calls 13: sys_mmapnx_rv64im_rf_initnx_rv64im_csr_initnx_clint_initnx_uart_initnx_rv64im_sim_init+7
83func main() -> i64
calls 7: g_putssys_mmaprun_amochkrun_lrscsys_exit+1